Tick: Programmable Low-Latency SDR System
Introduction
Tick is a new SDR system that provides programmability and ensures low latency at both PHY and MAC. It supports modular design and element-based programming, similar to the Click router framework. It uses an accelerator-rich architecture, where an embedded processor executes control flows and handles various MAC events. User-defined accelerators offload those tasks, which are either computation-intensive or communication-heavy, or require fine-grained timing control, from the processor, and accelerate them in hardware. Tick applies a number of hardware and software co-design techniques to ensure low latency, including multi-clock-domain pipelining, field-based processing pipeline, separation of data and control flows, etc. We have implemented Tick and validated its effectiveness through extensive evaluations as well as two prototypes of 802.11ac SISO/MIMO and 802.11a/g full-duplex.
Publication
| The Tick Programmable Low-Latency SDR System ACM MobiCom'17 Haoyang Wu, Tao Wang, Zengwen Yuan, Chunyi Peng, Zhiwei Li, Zhaowei Tan, Boyan Ding, Xiaoguang Li, Yuanjie Li, Jun Liu, Songwu Lu |
Team Member
- Haoyang Wu (Peking University)
- Tao Wang (Peking University)
- Zengwen Yuan (University of California, Los Angeles)
- Chunyi Peng (Purdue University)
- Zhiwei Li (Peking University)
- Zhaowei Tan (University of California, Los Angeles)
- Boyan Ding (Peking University)
- Xiaoguang Li (Peking University)
- Yuanjie Li (University of California, Los Angeles)
- Jun Liu (Peking University)
- Songwu Lu (University of California, Los Angeles)
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DownloadResearch Support
We gratefully acknowledge research support from NSF (CNS-1423576 and CNS-1526985) and National Natural Science Foundation of China (NSFC) Grants 61370056 and 61531004.
